-
-
Notifications
You must be signed in to change notification settings - Fork 14.3k
Offload intrinsic #147936
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Offload intrinsic #147936
Conversation
9118683 to
23722aa
Compare
This comment has been minimized.
This comment has been minimized.
| } | ||
|
|
||
| pub fn from_ty<'tcx>(tcx: TyCtxt<'tcx>, ty: Ty<'tcx>) -> Self { | ||
| OffloadMetadata { payload_size: get_payload_size(tcx, ty), mode: TransferKind::Both } |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
If you already have the code here, I would add a small check for & or byVal (implies Mode ToGPU), vs &mut (implies Both).
In the future we would hope to analyze the & or byval case more, if we never read from it (before writing) then we could use a new mode 4, which allocates directly on the gpu.
This comment has been minimized.
This comment has been minimized.
|
☔ The latest upstream changes (presumably #148507) made this pull request unmergeable. Please resolve the merge conflicts. |
e0fd7be to
97a8e96
Compare
This comment has been minimized.
This comment has been minimized.
|
☔ The latest upstream changes (presumably #148721) made this pull request unmergeable. Please resolve the merge conflicts. |
3540edb to
e9d89ce
Compare
This comment has been minimized.
This comment has been minimized.
e9d89ce to
a08949b
Compare
This comment has been minimized.
This comment has been minimized.
a08949b to
9397d31
Compare
This comment has been minimized.
This comment has been minimized.
9397d31 to
7666b58
Compare
|
☔ The latest upstream changes (presumably #148151) made this pull request unmergeable. Please resolve the merge conflicts. |
1a7e216 to
0b71052
Compare
|
This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed. Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers. |
This comment has been minimized.
This comment has been minimized.
c39e4e5 to
ce5970c
Compare
ce5970c to
f39ec47
Compare
|
This removes a good amount of the hacks from my first MVP, further improvements can land in a follow-up PR. @bors r+ |
|
Perf results from rollup: Some regressions in the |
| // For now we only support up to 10 kernels named kernel_0 ... kernel_9, a follow-up PR is | ||
| // introducing a proper offload intrinsic to solve this limitation. |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks like this comment is now outdated as of this PR.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Thanks. We have a few follow-up PRs where I'll add it.
|
@Zalathar We add metadata and do work if and only if you set We also introduce one more intrinsic, so I guess the match arm against intrinsic get's slightly larger in |
This PR implements the minimal mechanisms required to run a small subset of arbitrary offload kernels without relying on hardcoded names or metadata.
offload(kernel, (..args)): an intrinsic that generates the necessary host-side LLVM-IR code.rustc_offload_kernel: a builtin attribute that marks device kernels to be handled appropriately.Example usage (pseudocode):